LPC1113FHN33/303,5 NXP Semiconductors, LPC1113FHN33/303,5 Datasheet - Page 536
LPC1113FHN33/303,5
Manufacturer Part Number
LPC1113FHN33/303,5
Description
ARM Microcontrollers - MCU Cortex-M0 24 kB flash up to 8kB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1113FHN33/303,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1113
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
24 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
28.4.5.2
28.4.5.2.1 Wake-up from WFI or sleep-on-exit . . . . . . . 464
28.4.5.2.2 Wake-up from WFE . . . . . . . . . . . . . . . . . . . 464
28.4.5.3
28.5
28.5.1
28.5.2
28.5.3
28.5.3.1
28.5.3.2
28.5.3.3
28.5.3.3.1 ASR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 468
28.5.3.3.2 LSR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 468
28.5.3.3.3 LSL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469
28.5.3.3.4 ROR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470
28.5.3.4
28.5.3.5
28.5.3.6
28.5.3.6.1 The condition flags . . . . . . . . . . . . . . . . . . . . 471
28.5.3.6.2 Condition code suffixes . . . . . . . . . . . . . . . . 471
28.5.4
28.5.4.1
28.5.4.1.1 Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472
28.5.4.1.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 473
28.5.4.1.3 Restrictions. . . . . . . . . . . . . . . . . . . . . . . . . . 473
28.5.4.1.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 473
28.5.4.1.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 473
28.5.4.2
28.5.4.2.1 Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 473
28.5.4.2.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 473
28.5.4.2.3 Restrictions. . . . . . . . . . . . . . . . . . . . . . . . . . 474
28.5.4.2.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 474
28.5.4.2.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 474
28.5.4.3
28.5.4.3.1 Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 474
28.5.4.3.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 475
28.5.4.3.3 Restrictions. . . . . . . . . . . . . . . . . . . . . . . . . . 475
28.5.4.3.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 475
28.5.4.3.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 475
28.5.4.4
28.5.4.4.1 Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475
28.5.4.4.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 475
28.5.4.4.3 Restrictions. . . . . . . . . . . . . . . . . . . . . . . . . . 475
28.5.4.4.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 475
28.5.4.4.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 476
28.5.4.5
28.5.4.5.1 Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 476
28.5.4.5.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 476
28.5.4.5.3 Restrictions. . . . . . . . . . . . . . . . . . . . . . . . . . 476
28.5.4.5.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 477
28.5.4.5.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 477
28.5.4.5.6 Incorrect examples . . . . . . . . . . . . . . . . . . . . 477
28.5.4.6
28.5.4.6.1 Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477
28.5.4.6.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 477
28.5.4.6.3 Restrictions. . . . . . . . . . . . . . . . . . . . . . . . . . 477
28.5.4.6.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 478
28.5.4.6.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 478
UM10398
User manual
Instruction set . . . . . . . . . . . . . . . . . . . . . . . . 464
Wake-up from sleep mode . . . . . . . . . . . . . . 464
Power management programming hints. . . . 464
Instruction set summary . . . . . . . . . . . . . . . . 464
Intrinsic functions . . . . . . . . . . . . . . . . . . . . . 466
About the instruction descriptions. . . . . . . . . 467
Operands . . . . . . . . . . . . . . . . . . . . . . . . . . . 467
Restrictions when using PC or SP . . . . . . . . 467
Shift Operations . . . . . . . . . . . . . . . . . . . . . . 468
Address alignment . . . . . . . . . . . . . . . . . . . . 470
PC-relative expressions . . . . . . . . . . . . . . . . 470
Conditional execution . . . . . . . . . . . . . . . . . . 471
Memory access instructions . . . . . . . . . . . . . 472
ADR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472
LDR and STR, immediate offset . . . . . . . . . . 473
LDR and STR, register offset . . . . . . . . . . . . 474
LDR, PC-relative. . . . . . . . . . . . . . . . . . . . . . 475
LDM and STM . . . . . . . . . . . . . . . . . . . . . . . 476
PUSH and POP . . . . . . . . . . . . . . . . . . . . . . 477
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
28.5.5
28.5.5.1
28.5.5.1.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 479
28.5.5.1.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 479
28.5.5.1.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 480
28.5.5.1.4 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 480
28.5.5.2
28.5.5.2.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
28.5.5.2.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
28.5.5.2.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 481
28.5.5.2.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 481
28.5.5.2.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
28.5.5.3
28.5.5.3.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
28.5.5.3.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 482
28.5.5.3.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 482
28.5.5.3.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 482
28.5.5.3.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 482
28.5.5.4
28.5.5.4.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 483
28.5.5.4.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 483
28.5.5.4.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 483
28.5.5.4.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 483
28.5.5.4.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 483
28.5.5.5
28.5.5.5.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 483
28.5.5.5.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 484
28.5.5.5.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 484
28.5.5.5.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 484
28.5.5.5.5 Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . 484
28.5.5.6
28.5.5.6.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484
28.5.5.6.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 485
28.5.5.6.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 485
28.5.5.6.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 485
28.5.5.6.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 485
28.5.5.7
28.5.5.7.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485
28.5.5.7.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 485
28.5.5.7.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 486
28.5.5.7.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 486
28.5.5.7.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 486
28.5.5.8
28.5.5.8.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 486
28.5.5.8.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 486
28.5.5.8.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 486
28.5.5.8.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 486
28.5.5.8.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
28.5.5.9
28.5.5.9.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
28.5.5.9.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
28.5.5.9.3 Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 487
28.5.5.9.4 Condition flags . . . . . . . . . . . . . . . . . . . . . . . 487
28.5.5.9.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
28.5.6
28.5.6.1
28.5.6.1.1 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 488
28.5.6.1.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 488
General data processing instructions. . . . . . 478
ADC, ADD, RSB, SBC, and SUB. . . . . . . . . 479
AND, ORR, EOR, and BIC. . . . . . . . . . . . . . 480
ASR, LSL, LSR, and ROR . . . . . . . . . . . . . . 481
CMP and CMN. . . . . . . . . . . . . . . . . . . . . . . 482
MOV and MVN. . . . . . . . . . . . . . . . . . . . . . . 483
MULS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484
REV, REV16, and REVSH . . . . . . . . . . . . . . 485
SXT and UXT. . . . . . . . . . . . . . . . . . . . . . . . 486
TST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
Branch and control instructions . . . . . . . . . . 487
B, BL, BX, and BLX . . . . . . . . . . . . . . . . . . . 488
Chapter 29: Supplementary information
UM10398
© NXP B.V. 2012. All rights reserved.
536 of 538
Related parts for LPC1113FHN33/303,5
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
NXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2458 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2468 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2470 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2478 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The Philips Semiconductors XA (eXtended Architecture) family of 16-bit single-chip microcontrollers is powerful enough to easily handle the requirements of high performance embedded applications, yet inexpensive enough to compete in the market for hi
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The Philips Semiconductors XA (eXtended Architecture) family of 16-bit single-chip microcontrollers is powerful enough to easily handle the requirements of high performance embedded applications, yet inexpensive enough to compete in the market for hi
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The XA-S3 device is a member of Philips Semiconductors? XA(eXtended Architecture) family of high performance 16-bitsingle-chip microcontrollers
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The NXP BlueStreak LH75401/LH75411 family consists of two low-cost 16/32-bit System-on-Chip (SoC) devices
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The NXP LPC3141 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
The NXP LPC3143 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
The NXP LPC3152 combines an 180 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
The NXP LPC3154 combines an 180 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology
Manufacturer:
NXP Semiconductors
Datasheet: