C8051F581-IMR Silicon Labs, C8051F581-IMR Datasheet - Page 138

• Manufacturer Part Number: C8051F581-IMR
• Description: 8-bit Microcontrollers - MCU 50MIPS 128kB 8kB SPI
• Manufacturer: Silicon Labs

Specifications of C8051F581-IMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F58x/F59x
15. Flash Memory
On-chip, re-programmable Flash memory is included for program code and non-volatile data storage. The
Flash memory can be programmed in-system, a single byte at a time, through the C2 interface or by soft-
ware using the MOVX instruction. Once cleared to logic 0, a Flash bit must be erased to set it back to
logic 1. Flash bytes would typically be erased (set to 0xFF) before being reprogrammed. The write and
erase operations are automatically timed by hardware for proper execution; data polling to determine the
end of the write/erase operation is not required. Code execution is stalled during a Flash write/erase oper-
ation. Refer to Table 5.5 for complete Flash memory electrical characteristics.
15.1. Programming The Flash Memory
The simplest means of programming the Flash memory is through the C2 interface using programming
tools provided by Silicon Labs or a third party vendor. This is the only means for programming a non-initial-
ized device. For details on the C2 commands to program Flash memory, see Section “30. C2 Interface” on
page 349.
To ensure the integrity of Flash contents, the on-chip V
Monitor must be enabled and set to the high
DD
threshold when executing code that writes and/or erases Flash memory from software. See Section 15.4
for more details. Before performing any Flash write or erase procedure, set the FLEWT bit in Flash Scale
register (FLSCL) to 1. Also, note that 8-bit MOVX instructions cannot be used to erase or write to Flash
memory at addresses higher than 0x00FF.
15.1.1. Flash Lock and Key Functions
Flash writes and erases by user software are protected with a lock and key function. The Flash Lock and
Key Register (FLKEY) must be written with the correct key codes, in sequence, before Flash operations
may be performed. The key codes are: 0xA5, 0xF1. The timing does not matter, but the codes must be
written in order. If the key codes are written out of order, or the wrong codes are written, Flash writes and
erases will be disabled until the next system reset. Flash writes and erases will also be disabled if a Flash
write or erase is attempted before the key codes have been written properly. The Flash lock resets after
each write or erase; the key codes must be written again before a following Flash operation can be per-
formed. The FLKEY register is detailed in SFR Definition 15.2.
15.1.2. Flash Erase Procedure
The Flash memory can be programmed by software using the MOVX write instruction with the address and
data byte to be programmed provided as normal operands. Before writing to Flash memory using MOVX,
Flash write operations must be enabled by doing the following: (1) setting the PSWE Program Store Write
Enable bit (PSCTL.0) to logic 1 (this directs the MOVX writes to target Flash memory); and (2) Writing the
Flash key codes in sequence to the Flash Lock register (FLKEY). The PSWE bit remains set until cleared
by software.
A write to Flash memory can clear bits to logic 0 but cannot set them; only an erase operation can set bits
to logic 1 in Flash. A byte location to be programmed should be erased before a new value is written.
The Flash memory is organized in 512-byte pages. The erase operation applies to an entire page (setting
all bytes in the page to 0xFF). To erase an entire 512-byte page, perform the following steps:
1. Disable interrupts (recommended).
2. If erasing a page in Banks 1, 2, or 3, set the COBANK[1:0] bits (register PSBANK) for the appropriate
bank.
3. Set the PSEE bit (register PSCTL).
4. Set the PSWE bit (register PSCTL).
5. Write the first key code to FLKEY: 0xA5.
6. Write the second key code to FLKEY: 0xF1.
7. Using the MOVX instruction, write a data byte to any location within the 512-byte page to be erased.
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