C8051F581-IMR Silicon Labs, C8051F581-IMR Datasheet - Page 177

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C8051F581-IMR

Manufacturer Part Number
C8051F581-IMR
Description
8-bit Microcontrollers - MCU 50MIPS 128kB 8kB SPI
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F581-IMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
SFR Definition 19.2. OSCICN: Internal Oscillator Control
SFR Address = 0xA1; SFR Page = 0x0F;
Name
Reset
Bit
7:6 IOSCEN[1:0] Internal Oscillator Enable Bits.
2:0
Type
5
4
3
Bit
SUSPEND
Reserved
IFCN[2:0]
IFRDY
Name
R/W
7
1
IOSCEN[1:0]
00: Oscillator Disabled.
01: Reserved.
10: Reserved.
11: Oscillator enabled in normal mode and disabled in suspend mode.
Internal Oscillator Suspend Enable Bit.
Setting this bit to logic 1 places the internal oscillator in SUSPEND mode. The inter-
nal oscillator resumes operation when one of the SUSPEND mode awakening
events occurs.
Internal Oscillator Frequency Ready Flag.
0: Internal oscillator is not running at programmed frequency.
1: Internal oscillator is running at programmed frequency.
Read = 0b; Must Write = 0b.
Internal Oscillator Frequency Divider Control Bits.
000: SYSCLK derived from Internal Oscillator divided by 128.
001: SYSCLK derived from Internal Oscillator divided by 64.
010: SYSCLK derived from Internal Oscillator divided by 32.
011: SYSCLK derived from Internal Oscillator divided by 16.
100: SYSCLK derived from Internal Oscillator divided by 8.
101: SYSCLK derived from Internal Oscillator divided by 4.
110: SYSCLK derived from Internal Oscillator divided by 2.
111: SYSCLK derived from Internal Oscillator divided by 1.
R/W
6
1
SUSPEND
R/W
5
0
IFRDY
Rev. 1.2
R
4
1
Function
Reserved
R
3
0
C8051F58x/F59x
2
0
IFCN[2:0]
R/W
1
0
0
0
177

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