C8051F581-IMR Silicon Labs, C8051F581-IMR Datasheet - Page 139

• Manufacturer Part Number: C8051F581-IMR
• Description: 8-bit Microcontrollers - MCU 50MIPS 128kB 8kB SPI
• Manufacturer: Silicon Labs

Specifications of C8051F581-IMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

8. Clear the PSWE and PSEE bits.
15.1.3. Flash Write Procedure
Flash bytes are programmed by software with the following sequence:
1. Disable interrupts (recommended).
2. If writing to an address in Banks 1, 2, or 3, set the COBANK[1:0] (register PSBANK) for the appropriate
3. Erase the 512-byte Flash page containing the target location, as described in Section 15.1.2.
4. Set the PSWE bit (register PSCTL).
5. Clear the PSEE bit (register PSCTL).
6. Write the first key code to FLKEY: 0xA5.
7. Write the second key code to FLKEY: 0xF1.
8. Using the MOVX instruction, write a single data byte to the desired location within the 512-byte sector.
9. Clear the PSWE bit.
Steps 5–7 must be repeated for each byte to be written. After Flash writes are complete, PSWE should be
cleared so that MOVX instructions do not target program memory.
15.1.4. Flash Write Optimization
The Flash write procedure includes a block write option to optimize the time to perform consecutive byte
writes. When block write is enabled by setting the CHBLKW bit (CCH0CN.0), writes to two consecutive
bytes in Flash require the same amount of time as a single byte write. This is performed by caching the first
byte that is written to Flash and then committing both bytes to Flash when the second byte is written. When
block writes are enabled, if the second write does not occur, the first data byte written is not actually written
to Flash. Flash bytes with block write enabled are programmed by software with the following sequence:
1. Disable interrupts (recommended).
2. If writing to an address in Banks 1, 2, or 3, set the COBANK[1:0] bits (register PSBANK) for the
3. Erase the 512-byte Flash page containing the target location, as described in Section 15.1.2.
4. Set the CHBLKW bit (register CCH0CN).
5. Set the PSWE bit (register PSCTL).
6. Clear the PSEE bit (register PSCTL).
7. Write the first key code to FLKEY: 0xA5.
8. Write the second key code to FLKEY: 0xF1.
9. Using the MOVX instruction, write the first data byte to the desired location within the 512-byte sector.
10.Write the first key code to FLKEY: 0xA5.
11. Write the second key code to FLKEY: 0xF1.
12.Using the MOVX instruction, write the second data byte to the desired location within the 512-byte
13.Clear the PSWE bit.
14.Clear the CHBLKW bit.
bank.
appropriate bank
sector. The location of the second byte must be the next higher address from the first data byte.
Rev. 1.2
C8051F58x/F59x
139