C8051F581-IMR Silicon Labs, C8051F581-IMR Datasheet - Page 346

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C8051F581-IMR

Manufacturer Part Number
C8051F581-IMR
Description
8-bit Microcontrollers - MCU 50MIPS 128kB 8kB SPI
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F581-IMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F58x/F59x
SFR Definition 29.4. PCA1CPMn: PCA1 Capture/Compare Mode
SFR Addresses: PCA1CPM6 = 0xDA
PCA1CPM10 = 0xDE, PCA1CPM11 = 0xDF, SFR Page (all registers) = 0x10
346
Name PWM161n ECOM1n
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
PWM161n 16-bit Pulse Width Modulation Enable.
ECOM1n Comparator Function Enable.
CAPP1n Capture Positive Function Enable.
CAPN1n Capture Negative Function Enable.
ECCF1n Capture/Compare Flag Interrupt Enable.
PWM1n
TOG1n
MAT1n
Name
R/W
7
0
This bit enables 16-bit mode when Pulse Width Modulation mode is enabled.
0: 8 to 11-bit PWM selected.
1: 16-bit PWM selected.
This bit enables the comparator function for PCA1 module n when set to 1.
This bit enables the positive edge capture for PCA1 module n when set to 1.
This bit enables the negative edge capture for PCA1 module n when set to 1.
Match Function Enable.
This bit enables the match function for PCA1 module n when set to 1. When enabled,
matches of the PCA1 counter with a module's capture/compare register cause the
CCFn bit in PCA1MD register to be set to logic 1.
Toggle Function Enable.
This bit enables the toggle function for PCA1 module n when set to 1. When enabled,
matches of the PCA1 counter with a module's capture/compare register cause the logic
level on the CEXn pin to toggle. If the PWMn bit is also set to logic 1, the module oper-
ates in Frequency Output Mode.
Pulse Width Modulation Mode Enable.
This bit enables the PWM function for PCA1 module n when set to 1. When enabled, a
pulse width modulated signal is output on the CEXn pin. 8 to 11-bit PWM is used if
PWM16n is cleared; 16-bit mode is used if PWM16n is set to logic 1. If the TOGn bit is
also set, the module operates in Frequency Output Mode.
This bit sets the masking of the Capture/Compare Flag (CCFn) interrupt.
0: Disable CCFn interrupts.
1: Enable a Capture/Compare Flag interrupt request when CCFn is set.
R/W
6
0
CAPP1n
R/W
,
5
0
PCA1CPM7 = 0xDB
CAPN1n
R/W
Rev. 1.2
4
0
Function
,
MAT1n
PCA1CPM8 = 0xDC; PCA1CPM9 = 0xDD,
R/W
3
0
TOG1n
R/W
2
0
PWM1n
R/W
1
0
ECCF1n
R/W
0
0

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