C8051F581-IMR Silicon Labs, C8051F581-IMR Datasheet - Page 75

• Manufacturer Part Number: C8051F581-IMR
• Description: 8-bit Microcontrollers - MCU 50MIPS 128kB 8kB SPI
• Manufacturer: Silicon Labs

Specifications of C8051F581-IMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

8. Voltage Reference
The Voltage reference multiplexer on the C8051F58x/F59x devices is configurable to use an externally
connected voltage reference, the on-chip reference voltage generator routed to the VREF pin, or the V
power supply voltage (see Figure 8.1). The REFSL bit in the Reference Control register (REF0CN, SFR
Definition 8.1) selects the reference source for the ADC. For an external source or the on-chip reference,
REFSL should be set to 0 to select the VREF pin. To use V
set to 1.
The BIASE bit enables the internal voltage bias generator, which is used by the ADC, Temperature Sensor,
and internal oscillator. This bias is automatically enabled when any peripheral which requires it is enabled,
and it does not need to be enabled manually. The bias generator may be enabled manually by writing a 1
to the BIASE bit in register REF0CN. The electrical specifications for the voltage reference circuit are given
in Table 5.11.
The on-chip voltage reference circuit consists of a temperature stable bandgap voltage reference genera-
tor and a gain-of-two output buffer amplifier. The output voltage is selectable between 1.5 V and 2.25 V.
The on-chip voltage reference can be driven on the VREF pin by setting the REFBE bit in register REF0CN
to a 1. The maximum load seen by the VREF pin must be less than 200 µA to GND. Bypass capacitors of
0.1 µF and 4.7 µF are recommended from the VREF pin to GND. If the on-chip reference is not used, the
REFBE bit should be cleared to 0. Electrical specifications for the on-chip voltage reference are given in
Table 5.11.
Important Note about the VREF Pin: When using either an external voltage reference or the on-chip ref-
erence circuitry, the VREF pin should be configured as an analog pin and skipped by the Digital Crossbar.
Refer to Section “20. Port Input/Output” on page 186 for the location of the VREF pin, as well as details of
how to configure the pin in analog mode and to be skipped by the crossbar.
GND
VDD
4.7F
Recommended Bypass
R1
Figure 8.1. Voltage Reference Functional Block Diagram
Capacitors
+
Reference
External
Voltage
Circuit
0.1F
VREF
VDD
REF0CN
Rev. 1.2
0
1
IOSCE
N
Reference
DD
REFBE
Internal
EN
as the reference source, REFSL should be
EN
EN
Bias Generator
Temp Sensor
C8051F58x/F59x
To Analog Mux
(to ADC)
VREF
To ADC, Internal
Oscillators
DD
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