IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 125

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 7: Using the Interfaces Library
Avalon-MM FIFO Design Example
Figure 7–10. sopc_edge_detector.mdl Design Example
Compiling the Design
© June 2010 Altera Corporation
1
In this example, you use the Signal Compiler block to verify that your design
generates valid HDL.
Alternatively, use the TestBench block
Example”
To verify your design, follow these steps:
1. Double-click the Signal Compiler block.
2. Select the family and device for the DSP Development board you are using. The
3. Click Compile.
design example is configured for a Stratix 1S25 board
in
“Verifying the Design” on page
Preliminary
(“Avalon-MM Interface Blocks Design
7–11).
DSP Builder Standard Blockset User Guide
(Figure
7–11).
7–17