IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 140

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

8–10
Figure 8–8. S-Function Block Connection
DSP Builder Standard Blockset User Guide
}
During simulation, Simulink invokes certain callback methods from the S-function.
The callback methods are subfunctions that initialize, update discrete states, and
calculate output.
Table 8–1. S-Function Callback Methods
1. At the MATLAB command prompt, type:
2. Close the editor window and click on OK to close the Function Block Parameters
3. In the filter8tap/fir_vhdl window, connect the input port of the S-function block to
4. Click Save on the File menu to save the filter8tap.mdl file.
mdlInitializeSizes
mdlInitializeSampleTimes Specify the sample rates at which this S-function operates.
mdlStart
mdlOutputs
mdlUpdate
mdlTerminate
mex Sfir8tap.CPP r
The mex command compiles and links the source file into a shared library
executable in MATLAB, Sfir8tap.mexw32. The extension is specific to 32-bit
version of MATLAB run in Windows.
dialog box.
the data_in block, and connect the output port of the S-function block to the
data_out block
1
ssSetNumNonsampledZCs(S, 0);
ssSetOptions(S, 0);
Callback Method
You do not need to connect the simulink_sclr block. The HDL Entity
block automatically maps any input ports named simulink_clock in the
VHDL entity to the global clock signal, and any input ports named
simulink_sclr to the global synchronous clear signal.
Table 8–1
(Figure
shows the design example callback methods.
Preliminary
8–8).
Specify the number of inputs, outputs, states, parameters,
and other characteristics of the S-function.
Initialize the vectors of this S-function.
Compute the signals that this block emits.
Update the states of the block.
Perform any actions required at termination of simulation.
Chapter 8: Using Black Boxes for HDL Subsystems
Description
Subsystem Builder Design Example
© June 2010 Altera Corporation