IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 95

DSP BUILDER SOFTWARE

IPTR-DSPBUILDER

Manufacturer Part Number
IPTR-DSPBUILDER
Description
DSP BUILDER SOFTWARE
Manufacturer
Altera
Type
DSPr
Datasheets

Specifications of IPTR-DSPBUILDER

Function
DSP Builder
License
Renewal License
Software Application
IP CORE, DSP BUILDER
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
Not applicable / Not applicable
Chapter 5: Using HIL
Burst and Frame Modes
Using Burst Mode
Figure 5–6. Setting Parameters for the HIL Block in
© June 2010 Altera Corporation
1
To activate burst mode turn on the Burst Mode option in the Hardware in the loop
dialog box
When you set this option, you can specify the required number of data packets as the
Burst length. The HIL block sends data to the hardware in bursts of the size you
specify.
DSP Builder determines the size of the packet by the larger of the total input data
width or the total output data width. If the packet size multiplied by the Burst length
exceeds the preset data array, DSP Builder sets the Burst length to 1.
In the HIL model (C++), DSP Builder defines an array for storing the input and output
data to the HIL as 0x800000 byte in size. When the data record size (max of total input
bits and output bits) / 8 × burst length × 2 (for both input and output) exceeds this
number, DSP Builder resets the burst length to 1.
(Figure
5–6).
Figure 5–8
Preliminary
DSP Builder Standard Blockset User Guide
5–7

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