IPTR-DSPBUILDER Altera, IPTR-DSPBUILDER Datasheet - Page 69

• Manufacturer Part Number: IPTR-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPTR-DSPBUILDER

• Function: DSP Builder
• License: Renewal License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 3: Design Rules and Procedures
Analyzing the Hardware Resource Usage
Analyzing the Hardware Resource Usage
© June 2010 Altera Corporation
You can use the alt_dspbuilder_refresh_hdlimport command to update
these blocks. This command checks that the referenced HDL files (or Quartus II
project) exists. If it finds the references, the HDL Import dialog box opens and a
compilation is automatically invokes to regenerate the Simulink model. If it finds
neither, but there is an existing simulation netlist, it uses this netlist for simulation.
To run the command, follow these steps:
1. Start the MATLAB or Simulink software.
2. Open a Simulink model that contains imported HDL.
3. Run the command by typing the following at the MATLAB prompt:
You can optionally select a HDL Import block to run the command on only the
selected subsystem.
To analyze the hardware resources required for your design with a Resource Usage
block, follow these steps:
1. Select the AltLab library from the Altera DSP Builder BlockSet folder in the
2. Drag and drop a Resource Usage block into your model and double-click on
3. Double-click on the Signal Compiler block and click Compile to recompile
Figure 3–23. Resource Usage Block
alt_dspbuilder_refresh_hdlimport r
Simulink Library Browser.
the block to open the Resource Usage dialog box.
your design in the Quartus II software.
The Resource Usage block updates to show a summary of the estimated logic,
RAM and DSP block usage
The Resource Usage dialog box updates to show a detailed report of the resources
that each of the blocks require in your model that generate hardware.
Preliminary
(Figure
3–23).
DSP Builder Standard Blockset User Guide
3–25