MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 104

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

External Interrupt (IRQ)
9.5 IRQ Module During Break Interrupts
The system integration module (SIM) controls whether the IRQ interrupt latch can be cleared during the
break state. The BCFE bit in the SIM break flag control register (SBFCR) enables software to clear the
latches during the break state.
To allow software to clear the IRQ latch during a break interrupt, write a 1 to the BCFE bit. If a latch is
cleared during the break state, it remains cleared when the MCU exits the break state.
To protect the latch during the break state, write a 0 to the BCFE bit. With BCFE at 0 (its default state),
writing to the ACK bit in the IRQ status and control register during the break state has no effect on the
IRQ latch.
9.6 IRQ Status and Control Register
The IRQ status and control register (ISCR) controls and monitors operation of the IRQ module. The ISCR
has these functions:
IRQF — IRQ Flag Bit
ACK — IRQ Interrupt Request Acknowledge Bit
IMASK — IRQ Interrupt Mask Bit
MODE — IRQ Edge/Level Select Bit
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This read-only status bit is high when the IRQ interrupt is pending.
Writing a 1 to this write-only bit clears the IRQ latch. ACK always reads as 0. Reset clears ACK.
Writing a 1 to this read/write bit disables IRQ interrupt requests. Reset clears IMASK.
This read/write bit controls the triggering sensitivity of the IRQ pin. Reset clears MODE.
1 = IRQ interrupt pending
0 = IRQ interrupt not pending
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
Shows the state of the IRQ interrupt flag
Clears the IRQ interrupt latch
Masks IRQ interrupt request
Controls triggering sensitivity of the IRQ interrupt pin
Address:
Reset:
Read:
Write:
$001D
Bit 7
R
R
0
0
Figure 9-3. IRQ Status and Control Register (ISCR)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
= Reserved
R
6
0
0
R
5
0
0
R
4
0
0
IRQF
R
3
0
ACK
2
0
0
IMASK
1
0
Freescale Semiconductor
MODE
Bit 0
0