MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 139

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MC68HC908GP16CFB

Manufacturer Part Number
MC68HC908GP16CFB
Description
MCU 8-BIT 16K FLASH 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP16CFB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908GP16CFB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
WAKE — Wakeup Condition Bit
ILTY — Idle Line Type Bit
PEN — Parity Enable Bit
PTY — Parity Bit
Freescale Semiconductor
This read/write bit determines which condition wakes up the ESCI: a 1 (address mark) in the MSB
position of a received character or an idle condition on the RxD pin. Reset clears the WAKE bit.
This read/write bit determines when the ESCI starts counting 1s as idle character bits. The counting
begins either after the start bit or after the stop bit. If the count begins after the start bit, then a string
of 1s preceding the stop bit may cause false recognition of an idle character. Beginning the count after
the stop bit avoids false idle character recognition, but requires properly synchronized transmissions.
Reset clears the ILTY bit.
This read/write bit enables the ESCI parity function (see
function inserts a parity bit in the MSB position (see
This read/write bit determines whether the ESCI generates and checks for odd parity or even parity
(see
1 = Address mark wakeup
0 = Idle line wakeup
1 = Idle character bit count begins after stop bit
0 = Idle character bit count begins after start bit
1 = Parity function enabled
0 = Parity function disabled
1 = Odd parity
0 = Even parity
Table
13-5). Reset clears the PTY bit.
Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
M
0
1
0
0
1
1
Control Bits
PEN:PTY
0 X
0 X
1 0
1 1
1 0
1 1
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Table 13-5. Character Format Selection
Start Bits
1
1
1
1
1
1
Data Bits
8
9
7
7
8
8
NOTE
Character Format
Parity
None
None
Even
Even
Odd
Odd
Table
Table
Stop Bits
13-3). Reset clears the PEN bit.
1
1
1
1
1
1
13-5). When enabled, the parity
Character Length
10 bits
11 bits
10 bits
10 bits
11 bits
11 bits
I/O Registers
139

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