MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 273

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Changes from Rev 1.0 published on 17 April 2002 to Rev 2.0 published in May 2002
3V option removed.
PTB5 frequency divider function removed.
BEMF section moved from appendix to Section 18
Changes from Rev 0.4 published internally on 9 April 2002 to Rev 1.0 published
Change in revision number only to denote external release version.
Changes from Rev 0.3 published on 6 September 2001 to Rev 0.4 published internally
Freescale Semiconductor
Electrical Specifications
Configuration Registers
Configuration Registers
Monitor ROM (MON)
System Integration
Communications
Enhanced Serial
Communications
Enhanced Serial
Interface (ESCI)
Interface (ESCI)
FLASH Memory
Module (SIM)
Memory Map
Memory Map
(CONFIG1 &
(CONFIG1 &
CONFIG2)
CONFIG2)
on 17 April 2002
on 9 April 2002
Section
Section
Section
Module
Module
Page (in Rev 3.0)
Page (in Rev 2.0)
Page (in Rev 0.4)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
233
237
382
383
148
200
149
169
170
170
171
50
43
62
65
92
Extra paragraph added describing LINR bit functionality in LIN version 1.2
systems
‘SCI clock source’ changed to ‘Frequency of the SCI clock source’ in baud
rate equation and description
Output high voltage, I
Output low voltage, I
Footnotes 11, 12 and 13 added
ESCIBDSRC bit added to CONFIG2
ESCIBDSRC bit added to CONFIG2 with bit description
Baud rate selection sentence added to sections 14.5 and 14.5.2 and after
Table 14-10.
Reserved port register bits redefined as unimplemented
Note added about erasing last FLASH page
Removed last two sentences of FLASH Block Protection description
RST description added
PTB7 changed to PTC3
Table 10-1. Mode Selection added
Added sentence about forced monitor mode
Updated first note in section 10.5.1
PTB5 column added to Table 10-2
PTB5 pin added to Figure 10-1
.
LOAD
LOAD
=10.0mA changed to 5.0mA
=–10.0mA changed to –5.0mA
Description of change
Description of change
Description of change
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