MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 95

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MC68HC908GP16CFB

Manufacturer Part Number
MC68HC908GP16CFB
Description
MCU 8-BIT 16K FLASH 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP16CFB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

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Manufacturer
Quantity
Price
Part Number:
MC68HC908GP16CFB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
8.6 CONFIG Options
Four CONFIG options affect the functionality of the ICG. These options are:
All CONFIG options will have a default setting. Refer to
CONFIG2)
8.6.1 External Clock Enable (EXTCLKEN)
External clock enable (EXTCLKEN), when set, enables the ECGON bit to be set. ECGON turns on the
external clock input path through the PTC4/OSC1 pin. When EXTCLKEN is clear, ECGON cannot be set
and PTC4/OSC1 will always perform the PTC4 function.
The default state for this option is clear.
8.6.2 External Crystal Enable (EXTXTALEN)
External crystal enable (EXTXTALEN), when set, will enable an amplifier to drive the PTC3/OSC2 pin
from the PTC4/OSC1 pin. The amplifier will drive only if the external clock enable (EXTCLKEN) bit and
the ECGON bit are also set. If EXTCLKEN or ECGON are clear, PTC3/OSC2 will perform the PTC3
function. When EXTXTALEN is clear, PTC3/OSC2 will always perform the PTC3 function.
EXTXTALEN, when set, also configures the clock monitor to expect an external clock source in the valid
range of crystals (30 kHz to 100 kHz or 1 MHz to 8 MHz). When EXTXTALEN is clear, the clock monitor
will expect an external clock source in the valid range for externally generated clocks when using the clock
monitor (60 Hz to 32 MHz).
EXTXTALEN, when set, also configures the external clock stabilization divider in the clock monitor for a
4096 cycle timeout to allow the proper stabilization time for a crystal. When EXTXTALEN is clear, the
stabilization divider is configured to 16 cycles since an external clock source does not need a startup time.
The default state for this option is clear.
8.6.3 Slow External Clock (EXTSLOW)
Slow external clock (EXTSLOW), when set, will decrease the drive strength of the oscillator amplifier,
enabling low-frequency crystal operation (30 kHz–100 kHz) if properly enabled with the external clock
enable (EXTCLKEN) and external crystal enable (EXTXTALEN) bits. When clear, EXTSLOW enables
high-frequency crystal operation (1 MHz to 8 MHz).
EXTSLOW, when set, also configures the clock monitor to expect an external clock source that is slower
than the low-frequency base clock (60 Hz to 307.2 kHz). When EXTSLOW is clear, the clock monitor will
expect an external clock faster than the low-frequency base clock (307.2 kHz to 32 MHz).
The default state for this option is clear.
Freescale Semiconductor
1. EXTCLKEN, external clock enable
2. EXTXTALEN, external crystal enable
3. EXTSLOW, slow external clock
4. OSCENINSTOP, oscillator enable in stop
on how the CONFIG is used.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Chapter 5 Configuration Registers (CONFIG1 and
CONFIG Options
95

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