MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 35

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MC68HC908GP16CFB

Manufacturer Part Number
MC68HC908GP16CFB
Description
MCU 8-BIT 16K FLASH 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP16CFB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908GP16CFB
Manufacturer:
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Quantity:
10 000
2.5 Random Access Memory (RAM)
Addresses $0040–$00FF and $0100–$023F are RAM locations. The location of the stack RAM is
programmable with the reset stack pointer instruction (RSP). The 16-bit stack pointer allows the stack
RAM to be anywhere in the 64K-byte memory space.
Within page zero are 192 bytes of RAM. Because the location of the stack RAM is programmable, all page
zero RAM locations can be used for input/output (I/O) control and user data or code. When the stack
pointer is moved from its reset location at $00FF, direct addressing mode instructions can access all page
zero RAM locations efficiently. Page zero RAM, therefore, provides ideal locations for frequently
accessed global variables.
Before processing an interrupt, the CPU uses five bytes of the stack to save the contents of the central
processor unit (CPU) registers.
During a subroutine call, the CPU uses two bytes of the stack to store the return address. The stack
pointer decrements during pushes and increments during pulls.
2.6 FLASH Memory (FLASH)
The FLASH memory is an array of 15,872 bytes with an additional 36 bytes of user vectors and one byte
used for block protection.
The program and erase operations are facilitated through control bits in the FLASH control register
(FLCR). See
The FLASH is organized internally as an 16,384-word by 8-bit complementary metal-oxide semiconductor
(CMOS) page erase, byte (8-bit) program embedded FLASH memory. Each page consists of 64 bytes.
The page erase operation erases all words within a page. A page is composed of two adjacent rows.
A security feature prevents viewing of the FLASH contents.
In the 125°C to 135°C temperature range, the FLASH is guaranteed as read only.
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
Freescale Semiconductor
unauthorized users.
2.6.1 FLASH Control
For correct operation, the stack pointer must point only to RAM locations.
For M6805, M146805, and M68HC05 compatibility, the H register is not
stacked.
Be careful when using nested subroutines. The CPU could overwrite data
in the RAM during a subroutine or during the interrupt stacking operation.
An erased bit reads as 1 and a programmed bit reads as 0.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Register.
NOTE
NOTE
NOTE
NOTE
(1)
Random Access Memory (RAM)
35

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