MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 105

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Chapter 10
Keyboard Interrupt (KBD) Module
10.1 Introduction
The keyboard interrupt (KBD) module provides five independently maskable external interrupt pins.
10.2 Features
KBD features include:
10.3 Functional Description
Writing to the KBIE4–KBIE0 bits in the keyboard interrupt enable register independently enables or
disables each port as a keyboard interrupt pin. Enabling a keyboard interrupt pin also enables its internal
pullup device. A logic 0 applied to an enabled keyboard interrupt pin latches a keyboard interrupt request.
A keyboard interrupt is latched when one or more keyboard pins goes low after all were high. The MODEK
bit in the keyboard status and control register controls the triggering mode of the keyboard interrupt.
If the MODEK bit is set, the keyboard interrupt pins are both falling edge and low level sensitive, and both
of the following actions must occur to clear a keyboard interrupt request:
Freescale Semiconductor
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Five keyboard interrupt pins (PTA4/KBD4–PTA0/KBD0) with internal pullups, with separate
keyboard interrupt enable bits and one keyboard interrupt mask
Hysteresis buffers
Programmable edge only or edge and level interrupt sensitivity
Automatic interrupt acknowledge
Exit from low-power modes
If the keyboard interrupt is edge-sensitive only, a falling edge on a keyboard pin does not latch an
interrupt request if another keyboard pin is already low. To prevent losing an interrupt request on
one pin because another pin is still low, software can disable the latter pin while it is low.
If the keyboard interrupt is falling edge- and low level-sensitive, an interrupt request is present as
long as any keyboard pin is low.
Vector fetch or software clear — A vector fetch generates an interrupt acknowledge signal to clear
the interrupt request. Software may generate the interrupt acknowledge signal by writing a 1 to the
ACKK bit in the keyboard status and control register (KBSCR). The ACKK bit is useful in
applications that poll the keyboard interrupt pins and require software to clear the keyboard
interrupt request. Writing to the ACKK bit prior to leaving an interrupt service routine also can
prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions on
the keyboard interrupt pins. A falling edge that occurs after writing to the ACKK bit latches another
interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program
counter with the vector address at locations $FFE4 and $FFE5.
Return of all enabled keyboard interrupt pins to logic 1. As long as any enabled keyboard interrupt
pin is at logic 0, the keyboard interrupt remains set.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
105