MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 117

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MC68HC908GP16CFB

Manufacturer Part Number
MC68HC908GP16CFB
Description
MCU 8-BIT 16K FLASH 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP16CFB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

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Quantity
Price
Part Number:
MC68HC908GP16CFB
Manufacturer:
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Quantity:
10 000
12.3 Port B
Port B is an 8-bit special-function port that shares all of its pins with the analog-to-digital converter (ADC)
and some pin functions with TIMB.
Port B is designed so that the ADC function will take priority over the timer functionality on PTB6 and
PTB7. If the ADC is selected for a conversion on a previously enabled timer pin, the port pin will be
connected to the ADC and disconnected from the timer. If both the timer input capture and ADC functions
are being used on the same port pin, it is recommended that the timer channel be diabled before the pin
is enabled as an ADC input to avoid glitches. If both the timer output compare (or PWM) and ADC
functions are being used on the same port pin, it is recommended that the timer channel be disabled
before the pin is enabled as an ADC input.
12.3.1 Port B Data Register
The port B data register contains a data latch for each of the eight port B pins.
PTB[7:0] — Port B Data Bits
AD[7:0] — ADC Channels
TBCH[1:0] — Timer Channel I/O Bits
Freescale Semiconductor
These read/write bits are software programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
PTB7–PTB0 are eight ADC channels. The ADC channel select bits, CH[4:0], determine whether the
PTB7–PTB0 pins are ADC channels or general-purpose I/O pins. If an ADC channel is selected and a
read of this corresponding bit in the port B data register occurs, the data will be a 0 if the data direction
for this bit is programmed as an input. Otherwise, the data will reflect the value in the data latch (see
Chapter 3 Analog-to-Digital Converter (ADC)
port B pins that are being used by the ADC. However, the DDRB bits always determine whether
reading port B returns to the states of the latches or 0.
The PTB7/TBCH1–PTB6/TBCH0 pins are the TIMB input capture/output compare pins. The
edge/level select bits, ELSxB–ELSxA, determine whether the PTB7/TBCH1–PTB6/TBCH0 pins are
timer channel I/O pins or general-purpose I/O pins. See
Alternative Function:
Alternative Function:
Data direction register B (DDRB) does not affect the data direction of port
B pins that are being used by the TIMB. However, the DDRB bits always
determine whether reading port B returns the states of the latches or the
states of the pins. See
Address:
Reset:
Read:
Write:
TBCH1
$0001
PTB7
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Bit 7
AD7
Figure 12-4. Port B Data Register (PTB)
TBCH0
PTB6
AD6
Table
6
12-2.
PTB5
AD5
5
Module). DDRB does not affect the data direction of
NOTE
Unaffected by reset
PTB4
AD4
4
18.8.1 TIMB Status and Control
PTB3
AD3
3
PTB2
AD2
2
PTB1
AD1
1
PTB0
Bit 0
AD0
Register.
Port B
117

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