MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 63

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

COP Control Register
6.3.8 COPRS
The COPRS signal reflects the state of the COP rate select bit (COPRS) in the configuration register. See
Chapter 5 Configuration Registers (CONFIG1 and
CONFIG2).
6.4 COP Control Register
The COP control register is located at address $FFFF and overlaps the reset vector. Writing any value to
$FFFF clears the COP counter and starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
Address:
$FFFF
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Low byte of reset vector
Write:
Clear COP counter
Reset:
Unaffected by reset
Figure 6-2. COP Control Register (COPCTL)
6.5 Interrupts
The COP does not generate CPU interrupt requests.
6.6 Monitor Mode
The COP is disabled in monitor mode when V
is present on the IRQ pin or on the RST pin.
TST
6.7 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
6.7.1 Wait Mode
The COP remains active in wait mode. To prevent a COP reset during wait mode, periodically clear the
COP counter in a CPU interrupt routine.
6.7.2 Stop Mode
Stop mode turns off the CGMXCLK input to the COP and clears the COP prescaler. Service the COP
immediately before entering or after exiting stop mode to ensure a full COP timeout period after entering
or exiting stop mode.
The STOP bit in the configuration register (CONFIG) enables the STOP instruction. To prevent
inadvertently turning off the COP with a STOP instruction, disable the STOP instruction by clearing the
STOP bit.
6.8 COP Module During Break Interrupts
The COP is disabled during a break interrupt when V
is present on the RST pin.
TST
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
63