MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 86

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Internal Clock Generator (ICG) Module
8.3.4.3 External Clock Activity Detector
The external clock activity detector, shown in
clock (ECLK) every time the internal reference (IREF) is low. Since IREF is less than half the frequency
of ECLK, this should occur every time. If it does not occur two consecutive times, the external clock
inactivity indicator (EOFF) is set. EOFF will be cleared the next time there is a falling edge of ECLK while
IREF is low.
The external clock stable bit (ECGS) is also generated in the external clock activity detector. ECGS is set
on a falling edge of the external stabilization clock (ESTBCLK). This will be 4096 ECLK cycles after the
external clock generator on bit is set, or the MCU exits stop mode (ECGEN = 1) if the external crystal
enable (EXTXTALEN) in the CONFIG is set, or 16 cycles when EXTXTALEN is clear. ECGS is cleared
when the external clock generator is turned off or in stop mode (ECGEN is clear) or when EOFF is set.
86
OUTPUT CLOCK
DLF MEASURE
ESTBCLK
IBASE
ECGEN
ICGEN
CMON
FICGS
CMON
ECLK
EREF
IREF
NAME
NAME
NAME
NAME
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Figure 8-7. External Clock Activity Detector
Figure 8-6. Internal Clock Activity Detector
D
CK
D
CK
DFFRS
DFFRS
CONFIGURATION REGISTER BIT
TOP LEVEL SIGNAL
CONFIGURATION REGISTER BIT
TOP LEVEL SIGNAL
R
S
R
S
Q
Q
CK
CK
1/4
1/4
R
R
Figure
Q
Q
8-7, looks for at least one falling edge on the external
D
CK
D
CK
DFFRR
DFFRR
R
R
R
R
Q
Q
D
CK
DFFRR
NAME
NAME
NAME
NAME
R
R
Q
MODULE SIGNAL
MODULE SIGNAL
REGISTER BIT
REGISTER BIT
EGGS
EOFF
ICGS
IOFF
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