MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 217

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

18.8 I/O Registers
These I/O registers control and monitor TIMB operation:
18.8.1 TIMB Status and Control Register
The TIMB status and control register:
TOF — TIMB Overflow Flag Bit
TOIE — TIMB Overflow Interrupt Enable Bit
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This read/write flag is set when the TIMB counter reaches the modulo value programmed in the TIMB
counter modulo registers. Clear TOF by reading the TIMB status and control register when TOF is set
and then writing a 0 to TOF. If another TIMB overflow occurs before the clearing sequence is complete,
then writing 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a 1 to TOF has no effect.
This read/write bit enables TIMB overflow interrupts when the TOF bit becomes set. Reset clears the
TOIE bit.
1 = TIMB counter has reached modulo value
0 = TIMB counter has not reached modulo value
1 = TIMB overflow interrupts enabled
0 = TIMB overflow interrupts disabled
TIMB status and control register, TBSC
TIMB control registers, TBCNTH–TBCNTL
TIMB counter modulo registers, TBMODH–TBMODL
TIMB channel status and control registers, TBSC0 and TBSC1
TIMB channel registers, TBCH0H–TBCH0L and TBCH1H–TBCH1L
Enables TIMB overflow interrupts
Flags TIMB overflows
Stops the TIMB counter
Resets the TIMB counter
Prescales the TIMB counter clock
Address:
Reset:
Read:
Write:
$002B
Figure 18-4. TIMB Status and Control Register (TBSC)
Bit 7
TOF
R
0
0
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
= Reserved
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
R
3
0
PS2
2
0
PS1
1
0
Bit 0
PS0
0
I/O Registers
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