MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 62

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Computer Operating Properly (COP) Module
an overflow occurs prevents a COP reset by clearing the COP counter and stages 4–12 of the SIM
counter.
A COP reset pulls the RST pin low for 32 CGMXCLK cycles and sets the COP bit in the reset status
register (RSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ pin is held at V
V
6.3 I/O Signals
The following paragraphs describe the signals shown in
6.3.1 CGMXCLK
CGMXCLK is the crystal oscillator output signal. CGMXCLK frequency is equal to the crystal frequency.
6.3.2 STOP Instruction
The STOP instruction signal clears the COP prescaler.
6.3.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see
counter and clears stages 12 through 4 of the COP prescaler. Reading the COP control register returns
the reset vector.
6.3.4 Power-On Reset
The power-on reset (POR) circuit clears the COP prescaler 4096 CGMXCLK cycles after power-up.
6.3.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
6.3.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data bus. A reset vector fetch clears
the COP prescaler.
6.3.7 COPD
The COPD signal reflects the state of the COP disable bit (COPD) in the configuration register. See
Chapter 5 Configuration Registers (CONFIG1 and
62
TST
on the RST pin disables the COP.
Service the COP immediately after reset and before entering or after exiting
stop mode to guarantee the maximum time before the first COP counter
overflow.
Place COP clearing instructions in the main program and not in an interrupt
subroutine. Such an interrupt subroutine could keep the COP from
generating a reset even while the main program is not working properly.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
NOTE
NOTE
CONFIG2).
Figure
6.4 COP Control
6-1.
TST
Register) clears the COP
. During the break state,
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