MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 151

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

13.9 ESCI Arbiter
The ESCI module comprises an arbiter module designed to support software for communication tasks as
bus arbitration, baud rate recovery and break time detection. The arbiter module consists of an 9-bit
counter with 1-bit overflow and control logic. The CPU can control operation mode via the ESCI arbiter
control register (SCIACTL).
13.9.1 ESCI Arbiter Control Register
AM1 and AM0 — Arbiter Mode Select Bits
ALOST — Arbitration Lost Flag
ACLK — Arbiter Counter Clock Select Bit
AFIN— Arbiter Bit Time Measurement Finish Flag
Freescale Semiconductor
As shown in
AM1 and AM0.
This read-only bit indicates loss of arbitration. Clear ALOST by writing a 0 to AM1. Reset clears
ALOST.
This read/write bit selects the arbiter counter clock source. Reset clears ACLK.
This read-only bit indicates bit time measurement has finished. Clear AFIN by writing any value to
SCIACTL. Reset clears AFIN.
1 = Arbiter counter is clocked with one quarter of the ESCI input clock generated by the ESCI
0 = Arbiter counter is clocked with the bus clock divided by four
1 = Bit time measurement has finished
0 = Bit time measurement not yet finished
prescaler.
Address:
For ACLK=1, the Arbiter input clock is driven from the ESCI prescaler. The
prescaler can be clocked by either the bus clock or CGMXCLK depending
on the state of the ESCIBDSRC bit in CONFIG2.
Reset:
Table
Read:
Write:
13-12, these read/write bits select the mode of the arbiter module. Reset clears
Figure 13-18. ESCI Arbiter Control Register (SCIACTL)
$0018
AM1
Bit 7
0
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Table 13-12. ESCI Arbiter Selectable Modes
AM[1:0]
= Unimplemented
ALOST
0 0
0 1
1 0
1 1
6
0
AM0
5
0
Idle / counter reset
Bit time measurement
Bus arbitration
Reserved / do not use
NOTE
ACLK
4
0
ESCI Arbiter Mode
AFIN
3
0
ARUN
2
0
AROVFL
1
0
ARD8
Bit 0
0
ESCI Arbiter
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