MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 201

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

17.7 I/O Signals
Port D shares two of its pins with the TIMA. There is no external clock input to the TIMA prescaler. The
two TIMA channel I/O pins are PTD0/TACH0 and PTD1/TACH1. See
(PORTS)
17.7.1 TIMA Channel I/O Pins (PTD0/TACH0, PTD1/TACH1)
Each channel I/O pin is programmable independently as an input capture pin or an output compare pin.
PTD0/TACH0 and PTD1/TACH1 can be configured as buffered output compare or buffered PWM pins.
17.8 I/O Registers
These I/O registers control and monitor TIMA operation:
17.8.1 TIMA Status and Control Register
The TIMA status and control register (TASC):
TOF — TIMA Overflow Flag Bit
Freescale Semiconductor
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This read/write flag is set when the TIMA counter reaches the modulo value programmed in the TIMA
counter modulo registers. Clear TOF by reading the TIMA status and control register when TOF is set
and then writing a 0 to TOF. If another TIMA overflow occurs before the clearing sequence is complete,
then writing 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a 1 to TOF has no effect.
1 = TIMA counter has reached modulo value
0 = TIMA counter has not reached modulo value
TIMA status and control register, TASC
TIMA control registers, TACNTH–TACNTL
TIMA counter modulo registers, TAMODH–TAMODL
TIMA channel status and control registers, TASC0 and TASC1
TIMA channel registers, TACH0H–TACH0L and TACH1H–TACH1L
Enables TIMA overflow interrupts
Flags TIMA overflows
Stops the TIMA counter
Resets the TIMA counter
Prescales the TIMA counter clock
Address:
Reset:
Read:
Write:
Figure 17-4. TIMA Status and Control Register (TASC)
$0020
Bit 7
TOF
R
0
0
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
= Reserved
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
R
3
0
PS2
Chapter 12 Input/Output (I/O) Ports
2
0
PS1
1
0
Bit 0
PS0
0
I/O Signals
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