MC68HC908GP16CFB Freescale Semiconductor, MC68HC908GP16CFB Datasheet - Page 157

• Manufacturer Part Number: MC68HC908GP16CFB
• Description: MCU 8-BIT 16K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP16CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.2.1 Bus Timing
In user mode, the internal bus frequency is the internal clock generator output (CGMXCLK) divided by
four.
14.2.2 Clock Startup from POR or LVI Reset
When the power-on reset (POR) module or the low-voltage inhibit (LVI) module generates a reset, the
clocks to the CPU and peripherals are inactive and held in an inactive phase until after 4096 CGMXCLK
cycles. The MCU is held in reset by the SIM during this entire period. The bus clocks start upon completion
of the timeout.
14.2.3 Clocks in Stop Mode and Wait Mode
Upon exit from stop mode by an interrupt or reset, the SIM allows CGMXCLK to clock the SIM counter.
The CPU and peripheral clocks do not become active until after the stop delay timeout. Stop mode
recovery timing is discussed in detail in
In wait mode, the CPU clocks are inactive. Refer to the wait mode subsection of each module to see if the
module is active or inactive in wait mode. Some modules can be programmed to be active in wait mode.
14.3 Reset and System Initialization
The MCU has these internal reset sources:
All of these resets produce the vector $FFFE–$FFFF ($FEFE–$FEFF in monitor mode) and assert the
internal reset signal (IRST). IRST causes all registers to be returned to their default values and all
modules to be returned to their reset states.
These internal resets clear the SIM counter and set a corresponding bit in the SIM reset status register
(SRSR). See
14.3.1 External Pin Reset
The RST pin circuits include an internal pullup device. Pulling the asynchronous RST pin low halts all
processing. The PIN bit of the SIM reset status register (SRSR) is set as long as RST is held low for at
least the minimum t
Freescale Semiconductor
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Power-on reset (POR) module
Computer operating properly (COP) module
Low-voltage inhibit (LVI) module
Illegal opcode
Illegal address
Forced monitor mode entry reset (MENRST) module
CGMOUT
RST
IAB
14.4 SIM Counter
PC
IRL
time.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Figure 14-3
and
Figure 14-3. External Reset Timing
14.7.2 SIM Reset Status
14.6.2 Stop
shows the relative timing.
Mode.
Register.
VECT H
VECT L
Reset and System Initialization
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