MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 124
MC68HC711G5
Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC711G5.pdf
(195 pages)
- Current page: 124 of 195
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The following boundary conditions cause these results:
If PWDTYx = $00, PWPERx > $00, PPOLx = 0;
If PWDTYx = $00, PWPERx > $00, PPOLx = 1;
If PWDTYx = or > PWPERx, PPOLx = 0;
If PWDTYx = or > PWPERx, PPOLx = 1;
If PWPERx = $00 & PPOLx = 0;
If PWPERx = $00 & PPOLx = 1;
10.5.1 Counter Registers (PWCNTX)
Each channel has its own counter. Each counter may be read at any time without affecting the count
or the operation of the PWM channel. Writing to a counter causes the counter to be reset to $00.
Generally, writing to a counter is done before the counter is enabled. Writing to a counter can also
be done while it is enabled (counting), but this may cause a truncated PWM period.
READ:
WRITE:
RESET:
When a channel becomes enabled (i.e. when PWENx is written from 0 to 1), the associated PWM
counter starts to count from the value in this PWCNTx register, using whichever clock has been
selected for that channel.
MOTOROLA
10-4
10.4
10.5
BOUNDARY CASES
PWM REGISTERS
$1064
$1065
$1066
$1067
Any time.
Forces value to $00.
$00.
BIT7
BIT7
BIT7
BIT7
7
BIT6
BIT6
BIT6
BIT6
6
PULSE WIDTH MODULATION TIMER
BIT5
BIT5
BIT5
BIT5
5
BIT4
BIT4
BIT4
BIT4
4
BIT3
BIT3
BIT3
BIT3
3
the output is always high.
the output is always low.
the output is always low.
the output is always high.
output x is always low.
output x is always high.
BIT2
BIT2
BIT2
BIT2
2
BIT1
BIT1
BIT1
BIT1
1
BIT0
BIT0
BIT0
BIT0
0
PWCNT1
PWCNT2
PWCNT3
PWCNT4
MC68HC11G5
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