MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 23
MC68HC711G5
Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC711G5.pdf
(195 pages)
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MC68HC11G5
FCOP — Force COP Watchdog Failure
CBYP2 — Timer Counter 2 Chain By-pass
The following table shows the pin usage for the MC68HC11G5.
The following paragraphs describe the input/output signals used by the various functions of
the MCU.
2.2.1
Power is supplied to the MCU via three positive supply pins (V
that, for ease of identification, the V
V
are called V
2.2
DDL
and V
SIGNAL DESCRIPTION
Input Power (V
0 – Normal operation
1 – Immediately generates a COP failure reset. Note that COP must be otherwise
0 – Normal operation
1 – 16-bit free running timer counter 2 is divided into 8-bit halves and the prescaler is
The DISR control bit has priority over the FCM and FCOP control bits such that, if DISR
is set to one, no reset results even when FCM or FCOP is set to one.
DDR
SSL
, respectively. Similarly, the V
and V
enabled for the reset to be generated; NOCOP = 0.
by-passed. The system E-clock drives both halves directly.
5 Volt Supply (V
Ground (V
RESET
Oscillator (XTAL, EXTAL)
E
R/W
IRQ
XIRQ
HALT
Mode Select (V
Analog Reference (V
8-bit Ports (7)
6-bit Port (1)
4-bit Port (1)
——————————————————————
Total
SSR
DD
OPERATING MODES AND SIGNAL DESCRIPTION
.
) and Ground (V
SS
, V
SSL
kam
DD
DD
pins on the left and right sides of the device package are called
, V
, V
& LIR)
rh
DDL
SSR
, V
, V
)
SS
rl
SS
)
DDR
pins on the left and right sides of the device package
)
)
DD
) and three ground pins (V
56
84 pins
3
3
1
2
1
1
1
1
1
2
2
6
4
MOTOROLA
SS
). Note
2-5
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