MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 31
MC68HC711G5
Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC711G5.pdf
(195 pages)
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MC68HC11G5
3.4.2
This normal operating mode is established by having a logic one level on both the MODB/V
and the MODA/LIR pin at the rising edge of RESET. The ROMON bit in the CONFIG register is a
zero in this mode so that the user ROM does not appear in the map. The initial memory map which
results is also controlled by the state of three bits (RBOOT, SMOD, and MDA) in the HPRIO control
register which are initialized automatically by hardware prior to the rising edge on RESET.
Initial conditions affecting the memory map are:
$A000
$B000
$E000
$F000
$FFFF
$0000
$1000
$2000
$3000
$4000
$5000
$6000
$7000
$8000
$9000
$C000
$D000
ROMON = 0, RBOOT = 0, SMOD = 0, MDA = 1
Expanded Non-multiplexed Mode
Single
Chip
Normal Modes
Non-Multiplexed
Expanded
External
External
MEMORY AND CONTROL/STATUS REGISTERS
Figure 3-1. Memory Map
Bootstrap
Special Modes
External
External
Test
256 bytes
Bootstrap
$BFFF
$0000
$01FF
$1000
$107F
$BF00
$C000
$FFFF
ROM
512 byte RAM
(May be remapped to any 4k
boundary by the INIT register)
128-byte Register Block
(May be remapped to any 4k boundary
by the INIT register)
16k ROM
$BFC0
$BFFF
$FFC0
$FFFF
MOTOROLA
Special Modes
Interrupt Vectors
Normal Modes
interrupt Vectors
kam
pin
3-3
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