MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 89

• Manufacturer Part Number: MC68HC711G5
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC11G5
6.4.20 Pulse Accumulator Control Register (PACTL)
READ:
WRITE:
RESET:
PAEN — Pulse Accumulator System Enable
PAMOD — Pulse Accumulator Mode
PEDGE — Pulse Accumulator Edge Control
PEDGE in Event Counter Mode (PAMOD = 0):
PEDGE in Gated Time Accumulation Mode (PAMOD = 1):
RESET:
Any time.
Any time.
$00
When PAEN is zero, the pulse accumulator counter is disabled from counting and the
PAIF and PAOVF flags cannot be set. The counter value and the states of the two flags
are not altered by the state of the PAEN bit (writing PAEN to zero does not clear them).
When PAEN is a one, the pulse accumulator counter and the setting mechanisms on the
two pulse accumulator flags PAIF and PAOVF are enabled.
0 – Pulse accumulator system disabled (no flags can become set and the counter is
1 – Pulse accumulator system enabled
The PAMOD control bit specifies “event” or “gated time accumulation” mode.
0 – Event counter mode.
1 – Gated time accumulation mode.
The PEDGE bit is used to specify the active edge for the PAI input pin which is interpreted
as the trailing edge for the PAI gate enable input when the system is configured for gated
time accumulation.
0 – Falling edges on PAI pin cause the count to be incremented.
1 – Rising edges on PAI pin cause the count to be incremented.
0 – PAI input pin high enables E divided by 64 clock to pulse accumulator and the
1 – PAI input pin low enables E divided by 64 clock to pulse accumulator and the
$1026
stopped).
trailing falling edge on PAI sets the PAIF flag.
trailing rising edge on PAI sets the PAIF flag.
0
7
0
PAEN PAMOD PEDGE
6
0
PROGRAMMABLE TIMER
5
0
4
0
I4/O5
3
0
RTR2
2
0
RTR1
1
0
RTR0
0
0
PACTL
MOTOROLA
6-19