MC68HC711G5 MOTOROLA [Motorola, Inc], MC68HC711G5 Datasheet - Page 165
MC68HC711G5
Manufacturer Part Number
MC68HC711G5
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC711G5.pdf
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MC68HC11G5
Wait for interrupt (WAI) has two main purposes. WAI is executed to place the MCU in a reduced
power consumption standby state (WAIT mode) until some interrupt occurs. The other use is to
reduce the latency time to some important interrupt. The reduction of latency comes about
because the time consuming task of storing the CPU registers on the stack is done as soon as
the WAI instruction starts to execute. When the interrupt finally comes, the CPU is ready to
fetch the appropriate vector so the delay associated with register stacking is eliminated from latency
calculations.
12.3.4.5
NOP can be used to introduce a small time delay into the flow of a program. This is often useful in
meeting the timing requirements of slow peripherals. By incorporating NOP instructions into loops,
longer delays can be produced.
During debugging it is common to replace various instructions with NOP opcodes to effectively
remove an unwanted instruction without having to rearrange the rest of the program.
Occasionally a programmer is faced with the problem of fine tuning the delays through various paths
in his program. In such cases it is sometimes useful to use a BRN instruction as a 3 cycle NOP. It
is also possible to fine tune execution time by choosing alternate addressing mode variations of
instructions to change the execution time of an instruction sequence without changing the program’s
function.
STOP causes the oscillator and all MCU clocks to freeze. This frozen state is called STOP mode
and power consumption is dramatically reduced in this mode. The operation of this instruction is also
dependent upon the S condition code bit because the STOP mode is not appropriate for all
applications. If S is 1 the STOP instruction is treated as a no operation (NOP) instruction and
processing just continues to the next instruction.
The TEST instruction is used only during factory testing and is treated as an illegal opcode in normal
operating modes of the MCU. This instruction causes unusual behaviour on the address bus (counts
backwards) which prevents its use in any normal system.
Miscellaneous (NOP, STOP, TEST)
No Operation (2-cycle delay
Stop Clocks
Test
Table 12-13. Miscellaneous (NOP, STOP, TEST)
CPU, ADDRESSING MODES AND INSTRUCTION SET
Function
Mnemonic
STOP
TEST
NOP
INH
X
X
X
MOTOROLA
12-15
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