DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1094
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Section 22 AND/NAND Flash Memory Controller (FLCTL)
22.3.2
FLCMDCR is a 32-bit readable/writable register that issues a command in command access mode,
specifies address issue, and specifies source or destination of data transfer. In sector access mode,
FLCMDCR specifies the number of sector transfers.
Initial value:
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 1062 of 1650
REJ09B0313-0300
Bit
31
30 to 27
R/W:
R/W:
Bit:
Bit:
CNT2
Command Control Register (FLCMDCR)
ADR
R/W
R/W
31
15
Bit Name
ADRCNT2 0
SCTCNT
[19:16]
0
0
R/W
R/W
30
14
0
0
SCTCNT[19:16]
R/W
R/W
29
13
0
0
Initial
Value
All 0
R/W
R/W
28
12
0
0
R/W
R/W
27
11
0
0
R/W
R
R/W
R/W
R/W
ADR
MD
26
10
0
0
Description
Specifies the number of bytes for the address data to
be issued in address stage. This bit is used together
with ADRCNT[1:0].
0: Issue the address of byte count, specified by
1: Issue 5-byte address. ADRCNT[1:0] should be set
Sector Transfer Count Specification [19:16]
These bits are extended bits of the sector transfer count
specification bits (SCTCNT) 15 to 0.
SCTCNT[19:16] and SCTCNT[15:0] are used together
to operate as SCTCNT[19:0], the 20-bit counter.
Address Issue Byte Count Specification 2
R/W
R/W
CDS
RC
25
0
9
0
ADRCNT[1:0].
to 00.
DOSR
SCTCNT[15:0]
R/W
R/W
24
0
8
0
R/W
23
R
0
7
0
-
R/W
22
R
0
6
0
-
R/W
R/W
SEL
RW
21
0
5
0
R/W
R/W
DOA
20
DR
0
4
0
ADRCNT[1:0]
R/W
R/W
19
0
3
0
R/W
R/W
18
0
2
0
R/W
R/W
DOC
MD2
17
0
1
0
R/W
R/W
DOC
MD1
16
0
0
0
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