DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 717

Manufacturer Part Number

DS72030W200FPV

MPU, 32BIT, SH7203, ROMLESS, 240QFP

Manufacturer

Renesas Electronics America

Program Memory Size

Digital Ic Case Style

Supply Voltage Range

1.1V To 1.3V

Operating Temperature Range

-20Â°C To +85Â°C

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

5. The counter stops at the value of H'00.

6. Before changing WTCNT after execution of the frequency change instruction, always confirm

1. Set the WT/IT bit in WTCSR to 1, the type of count clock in the CKS[2:0] bits in WTCSR,

2. Set the TME bit in WTCSR to 1 to start the count in watchdog timer mode.

3. While operating in watchdog timer mode, rewrite the counter periodically to H'00 to prevent

4. When the counter overflows, the WDT sets the WOVF flag in WRCSR to 1, and the

5. If the RSTE bit in WRCSR is set to 1, a signal to reset the inside of this LSI can be generated

6. When a WDT overflow reset is generated simultaneously with a reset input on the RES pin,

that the value of WTCNT is H'00 by reading from WTCNT.

whether this LSI is to be reset internally or not in the RSTE bit in WRCSR, the reset type if it

is generated in the RSTS bit in WRCSR, and the initial value of the counter in WTCNT.

the counter from overflowing.

WDTOVF signal is output externally (figure 13.4). The WDTOVF signal can be used to reset

the system. The WDTOVF signal is output for 64 × Pφ clock cycles.

simultaneously with the WDTOVF signal. Either power-on reset or manual reset can be

selected for this interrupt by the RSTS bit in WRCSR. The internal reset signal is output for

128 × Pφ clock cycles.

the RES pin reset takes priority, and the WOVF bit in WRCSR is cleared to 0.

Using Watchdog Timer Mode

Rev. 3.00 Sep. 28, 2009 Page 685 of 1650

Section 13 Watchdog Timer (WDT)

REJ09B0313-0300