DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 129
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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3.2.2
Figure 3.3 shows the bit pattern of a non-number (NaN). A value is NaN in the following case:
• Sign bit: Don't care
• Exponent field: All bits are 1
• Fraction field: At least one bit is 1
The NaN is a signaling NaN (sNaN) if the MSB of the fraction field is 1, and a quiet NaN (qNaN)
if the MSB is 0.
An sNaN is input in an operation, except copy, FABS, and FNEG, that generates a floating-point
value.
• When the EN.V bit in FPSCR is 0, the operation result (output) is a qNaN.
• When the value of the EN.V bit in FPSCR is 1, FPU exception handling is triggered by an
If a qNaN is input in an operation that generates a floating-point value, and an sNaN has not been
input in that operation, the output will always be a qNaN irrespective of the setting of the EN.V bit
in FPSCR. An exception will not be generated in this case.
The qNAN values as operation results are as follows:
• Single-precision qNaN: H'7FBF FFFF
• Double-precision qNaN: H'7FF7 FFFF FFFF FFFF
See the individual instruction descriptions for details of floating-point operations when a non-
number (NaN) is input.
invalid operation exception. In this case, the contents of the operation destination register are
unchanged.
Non-Numbers (NaN)
N = 1: sNaN
N = 0: qNaN
31
x
30
11111111
Figure 3.3 Single-Precision NaN Bit Pattern
23
22
Nxxxxxxxxxxxxxxxxxxxxxx
Rev. 3.00 Sep. 28, 2009 Page 97 of 1650
Section 3 Floating-Point Unit (FPU)
REJ09B0313-0300
0
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