DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 39
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Items
AND/NAND flash
memory controller
(FLCTL)
USB2.0 host/function
module (USB)
LCD controller (LCDC) •
I/O ports
A/D converter (ADC)
D/A converter (DAC)
User break controller
(UBC)
User debugging
interface (H-UDI)
Specification
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From 16 × 1 to 1024 × 1024 dots supported
Supports 4/8/15/16-bpp color modes
Supports 1/2/4/6-bpp gray scale modes
TFT/DSTN/STN panels supported
Signal polarity setting function
24-bit color pallet memory (16 of the 24 bits are valid; R:5/G:6/B:5)
Unified graphics memory architecture
Direct-connected memory interface with AND-/NAND-type flash
memory
Read/write in sectors
Two types of transfer modes: Command access mode and sector
access mode (512-byte data + 16-byte management code: with ECC)
Interrupt request and DMAC transfer request
Supports flash memory requiring 5-byte addresses (2 Gbits and more)
Conforms to the Universal Serial Bus Specification Revision 2.0
480-Mbps and 12-Mbps transfer rates provided
Can be used as function
Software setting supported
On-chip 8-Kbyte RAM as communication buffers
82 I/Os, 16 inputs, and 1 output
Input or output can be selected for each bit
Internal weak keeper circuit
10-bit resolution
Eight input channels
A/D conversion request by the external trigger or timer trigger
8-bit resolution
Two output channels
Two break channels
Addresses, data values, type of access, and data size can all be set
as break conditions
E10A emulator support
JTAG-standard pin assignment
Rev. 3.00 Sep. 28, 2009 Page 7 of 1650
Section 1 Overview
REJ09B0313-0300
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