DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1209
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 23.12 Conditions under which a BRDY Interrupt is Generated
Access
Direction
Reading
Transfer
Direction Pipe
Receive
DCP
1 to 7
BFRE DBLB
⎯
0
0
0
1
Conditions under which BRDY Interrupt is
Generated
(1) or (2) below:
(1) Short packet reception, including a zero-
(2) Buffer is full by reception
(1), (2) or (3) below:
(1) Short packet reception, including a zero-
(2) Buffer is full* by reception
(3) Transaction counter ends when buffer is not
(1), (2), (3) or (4) below:
(1) One of (a) to (c) conditions occurs when
(2) Reading of one buffer is complete when
(3) Software sets the BCLR bit to 1 to clear
(4) The TGL bit in CFIFOSIE is set to 1 in
length packet
length packet
full.
both buffers are waiting for reception:
(a) Short packet reception, including a zero-
(b) One buffer of two is full* by reception
(c) Transaction counter ends when buffer is
both buffers are waiting for reading.
receive data in one buffer when both buffers
are waiting for reading.
continuous transfer mode (the CNTMD bit in
PIPECFG is set to 1) when the buffer on the
SIE side has data.
Section 23 USB 2.0 Host/Function Module (USB)
length packet
not full.
Rev. 3.00 Sep. 28, 2009 Page 1177 of 1650
REJ09B0313-0300
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