DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1653

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Item
10.3.4 DMA Channel
Control Registers
(CHCR)
Page
410
411
Revision (See Manual for Details)
Table amended
Notes added
Notes: 1. Only 0 can be written to clear the flag after 1 is
Bit
1
Bit Name
TE
2. If the flag is read at the same timing it is set to 1,
read.
the read data will be 0, but the internal state may
be the same as reading 1. Therefore, if 0 is written
to the flag, the flag will be cleared to 0 because the
internal state is the same as when writing 0 after
reading 1.
For details, refer to section 10.5.5, Notes on Using
Flag Bits.
Initial
Value
0
R/W
R/(W)*
Rev. 3.00 Sep. 28, 2009 Page 1621 of 1650
1
Description
Transfer End Flag
This bit is set to 1 when DMATCR becomes 0 and
DMA transfer ends.
The TE bit is not set to 1 in the following cases.
•
•
To clear the TE bit, write 0 after reading TE = 1.*
Even if the DE bit is set to 1 while the TEMASK bit is 0
and this bit is 1, transfer is not enabled.
0: During the DMA transfer or DMA transfer has been
[Clearing condition]
•
1: DMA transfer ends by the specified count (DMATCR
terminated
= 0)
DMA transfer ends due to an NMI interrupt or DMA
address error before DMATCR becomes 0.
DMA transfer is ended by clearing the DE bit and
DME bit in DMA operation register (DMAOR).
Writing 0 after reading TE = 1*
REJ09B0313-0300
2
2