DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 616

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
(o)
In complementary PWM mode, by setting the CCE bit in the timer waveform control register
(TWCR), it is possible to have TCNT_3, TCNT_4, and TCNTS cleared by TGRA_3 compare
match.
Figure 11.62 illustrates an operation example.
Notes: 1. Use this function only in complementary PWM mode 1 (transfer at crest)
Rev. 3.00 Sep. 28, 2009 Page 584 of 1650
REJ09B0313-0300
Figure 11.62 Example of Counter Clearing Operation by TGRA_3 Compare Match
Counter Clearing by TGRA_3 Compare Match
Output waveform
Output waveform
2. Do not specify synchronous clearing by another channel (do not set the SYNC0 to
3. Do not set the PWM duty value to H'0000.
4. Do not set the PSYE bit in timer output control register 1 (TOCR1) to 1.
SYNC4 bits in the timer synchronous register (TSYR) to 1.
TGRA_3
TGRB_3
H'0000
TCDR
TDDR
Counter cleared
by TGRA_3 compare match
Output waveform is active-high.

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