DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 923

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.3.3
SSITDR is a 32-bit register that stores data to be transmitted.
Data written to this register is transferred to the shift register upon transmission request. If the data
word length is less than 32 bits, the alignment is determined by the setting of the PDTA control bit
in SSICR. The data in the buffer can be accessed by reading this register.
Initial value:
Initial value:
18.3.4
SSIRDR is a 32-bit register that stores receive messages.
Data in this register is transferred from the shift register each time data word is received. If the
data word length is less than 32 bits, the alignment is determined by the setting of the PDTA
control bit in SSICR.
Initial value:
Initial value:
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Transmit Data Register (SSITDR)
Receive Data Register (SSIRDR)
R/W
R/W
31
15
31
15
R
R
0
0
0
0
R/W
R/W
30
14
30
14
R
R
0
0
0
0
R/W
R/W
29
13
29
13
R
R
0
0
0
0
R/W
R/W
28
12
28
12
R
R
0
0
0
0
R/W
R/W
27
11
27
11
R
R
0
0
0
0
R/W
R/W
26
10
26
10
R
R
0
0
0
0
R/W
R/W
25
25
R
R
0
9
0
0
9
0
R/W
R/W
24
24
R
R
0
8
0
0
8
0
R/W
R/W
23
23
R
R
0
7
0
0
7
0
Rev. 3.00 Sep. 28, 2009 Page 891 of 1650
R/W
R/W
22
22
R
R
0
6
0
0
6
0
Section 18 Serial Sound Interface (SSI)
R/W
R/W
21
21
R
R
0
5
0
0
5
0
R/W
R/W
20
20
R
R
0
4
0
0
4
0
R/W
R/W
19
19
R
R
0
3
0
0
3
0
REJ09B0313-0300
R/W
R/W
18
18
R
R
0
2
0
0
2
0
R/W
R/W
17
17
R
R
0
1
0
0
1
0
R/W
R/W
16
16
R
R
0
0
0
0
0
0