DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1152

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 23 USB 2.0 Host/Function Module (USB)
Rev. 3.00 Sep. 28, 2009 Page 1120 of 1650
REJ09B0313-0300
Bit
12
11, 10
9
8
Bit Name
DREQE
MBW[1:0]
TRENB
TRCLR
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W*
1
Description
DMA Transfer Request Enable
0: Request disabled
1: Request enabled
FIFO Port Access Bit Width
00: 8-bit width
01: 16-bit width
10: 32-bit width
11: Setting prohibited
When the selected CURPIPE is set to the buffer
memory read direction, set these bits and the
CURPIPE bits simultaneously.
For details, see 23.4.4, Buffer Memory.
Note: Once reading from the buffer memory is
Transaction Counter Enable
This bit is valid when the receiving direction (reading
from the buffer memory) has been set for the pipe
specified by the CURPIPE bits.
0: Transaction counter function is invalid.
1: Transaction counter function is valid.
Transaction Counter Clear
This bit is valid when the receiving direction (reading
from the buffer memory) has been set for the pipe
specified by the CURPIPE bits.
0: Invalid
1: The current count is cleared.
started, the access bit width of the FIFO port
cannot be changed until all of the data has
been read. Also, the bit width cannot be
changed from the 8-bit width to the 16-/32-bit
width or from the 16-bit width to the 32-bit width
while data is being written to the buffer
memory.

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