DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 166

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 5 Exception Handling
5.3.2
When an address error occurs, the bus cycle in which the address error occurred ends.* When the
executing instruction then finishes, address error exception handling starts. The CPU operates as
follows:
1. The exception service routine start address which corresponds to the address error that
2. The status register (SR) is saved to the stack.
3. The program counter (PC) is saved to the stack. The PC value saved is the start address of the
4. After jumping to the exception service routine start address fetched from the exception
Note: * In the case of an address error caused by a data read or write, if the address error is
Rev. 3.00 Sep. 28, 2009 Page 134 of 1650
REJ09B0313-0300
occurred is fetched from the exception handling vector table.
instruction to be executed after the last executed instruction.
handling vector table, program execution starts. The jump that occurs is not a delayed branch.
Address Error Exception Handling
caused by an instruction fetch and the bus cycle in which the address error occurred has
not ended by the end of the above operation, the CPU restarts address error exception
handling before the bus cycle ends.

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