DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 234

no-image

DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 7 User Break Controller (UBC)
7.3.2
BAMR is a 32-bit readable/writable register. BAMR specifies bits masked in the break address
bits specified by BAR.
Rev. 3.00 Sep. 28, 2009 Page 202 of 1650
REJ09B0313-0300
Initial value:
Initial value:
Bit
31 to 0
R/W:
R/W:
Bit:
Bit:
Break Address Mask Register (BAMR)
BAM31 BAM30 BAM29 BAM28 BAM27 BAM26 BAM25 BAM24 BAM23 BAM22 BAM21 BAM20 BAM19 BAM18 BAM17 BAM16
BAM15 BAM14 BAM13 BAM12 BAM11 BAM10 BAM9 BAM8 BAM7 BAM6 BAM5 BAM4 BAM3 BAM2 BAM1 BAM0
Bit Name
BAM31 to
BAM0
R/W
R/W
31
15
0
0
R/W
R/W
30
14
0
0
R/W
R/W
29
13
0
0
Initial
Value
All 0
R/W
R/W
28
12
0
0
R/W
R/W
27
11
0
0
R/W
R/W
R/W
R/W
26
10
0
0
Description
Break Address Mask
Specify bits masked in the break address bits specified
by BAR (BA31 to BA0).
0: Break address bit BAn is included in the break
1: Break address bit BAn is masked and not included
Note: n = 31 to 0
R/W
R/W
25
0
9
0
condition
in the break condition
R/W
R/W
24
0
8
0
R/W
R/W
23
0
7
0
R/W
R/W
22
0
6
0
R/W
R/W
21
0
5
0
R/W
R/W
20
0
4
0
R/W
R/W
19
0
3
0
R/W
R/W
18
0
2
0
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0

Related parts for DS72030W200FPV