IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 169

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Testbench & Example Designs
Table 5–8. Chaining DMA Descriptor Format Map
Table 5–9. Chaining DMA Descriptor Format Map (Control Fields)
Altera Corporation
December 2006
31
Reserved
EP Address
RC Address
Upper DWORD
RC Address
Lower DWORD
DMA Length
EPLAST_ENA
MSI
Table 5–10. Chaining DMA Descriptor Fields
Descriptor Field
21
Reserved
20
Reserved
EP Access
R
R
R
R
R
R
See
descriptor header. Each descriptor provides the hardware information on
one DMA transfer.
Tables
on the BFM shared memory.
R/W
R/W
R/W
R/W
R/W
R/W
Table 5–8
22 21
RC Access
PCI Express Compiler Version 6.1
5–8, 5–9, are related to the list of descriptor tables which resides
RC Address Upper DWORD
RC Address Lower DWORD
Reserved
Control Fields (see
for the format of the descriptor fields following the
EP Address
19
A 32-bit field that specifies the base address of the memory
transfer on the EP site.
the RC site.
Specifies the lower base address of the memory transfer on
the RC site.
This bit is OR’d with the EPLAST_ENA bit of the descriptor
header. When EPLAST_ENA is set the EP DMA module
updates the EPLast RC memory register with the value of the
last completed descriptor, in the form 0 – n.
This bit is OR’d with the MSI bit of the descriptor header. When
this bit is set the EP module sends an interrupt completion
message at the end of the DMA transfer of each channel.
Specifies the upper base address of the memory transfer on
Specifies the number of DMA bytes to transfer.
Table
describes each descriptor field.
18
Table
17
MSI
5–9)
Description
PCI Express Compiler User Guide
16 15
EPLAST_ENA
DMA Length
16
0
5–19