IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 221

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Altera Corporation
December 2006
k_vc0[35:28]
k_vc0[43:36]
k_vc0[55:44]
k_vc1[7:0]
k_vc1[19:8]
k_vc1[27:20]
k_vc1[35:28]
k_vc1[43:36]
k_vc1[55:44]
k_vc2[7:0]
k_vc2[19:8]
k_vc2[27:20]
k_vc2[35:28]
k_vc2[43:36]
k_vc2[55:44]
Table A–1. Configuration Signals for x1 and x4 MegaCore Functions (Part 5 of 6)
Signal
Fixed to 0
Fixed to 0
Fixed to 0
Calculated: VC Table
Posted Header Credit
Calculated: VC Table
Posted Data Credit
Calculated: VC Table Non-
Posted Header Credit
Fixed to 0
Fixed to 0
Fix to 0
Calculated: VC Table
Posted Header Credit
Calculated: VC Table
Posted Data Credit
Calculated: VC Table Non-
Posted Header Credit
Fixed to 0
Fixed to 0
Fixed to 0
Value or Wizard
Page/Label
PCI Express Compiler Version 6.1
Receive flow control credit for VC0 non-posted data.
The Rx buffer always has space for the maximum 1
DWORD of data that can be sent for non-posted writes
(configuration or I/O writes).
Receive flow control credit for VC0 completion headers.
Infinite completion credits must be advertised by
endpoints.
Receive flow control credit for VC0 completion data.
Infinite completion credits must be advertised by
endpoints.
Receive flow control credit for VC1 posted headers.
Receive flow control credit for VC1 posted data.
Receive flow control credit for VC1 non-posted
headers.
Receive flow control credit for VC1 non-posted data.
Non-posted writes (configuration and I/O writes) only
use VC0.
Receive flow control credit for VC1 completion headers.
Infinite completion credits must be advertised by
endpoints.
Receive flow control credit for VC1 completion data.
Infinite completion credits must be advertised by
endpoints.
Receive flow control credit for VC2 posted headers.
Receive flow control credit for VC2 posted data.
Receive flow control credit for VC2 non-posted
headers.
Receive flow control credit for VC2 non-posted data.
Non-posted writes (configuration and I/O writes) only
use VC0.
Receive flow control credit for VC2 completion headers.
Infinite completion credits must be advertised by
endpoints.
Receive flow control credit for VC2 completion data.
Infinite completion credits must be advertised by
endpoints.
PCI Express Compiler User Guide
Description
A–5