IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 211

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Testbench & Example Designs
Altera Corporation
December 2006
Syntax
Arguments
Syntax
Arguments
Table 5–56. chained_dma_test Procedure
Table 5–57.
dma_rd_test
dma_rd_test (bar_table, bar_num, use_msi, use_eplast)
bar_table
bar_num
Use_msi
Use_eplast
chained_dma_test (bar_table, bar_num, direction, use_msi,
use_eplast)
bar_table
bar_num
direction
Use_msi
Use_eplast
Procedure
Procedures and Functions Specific to the chaining DMA Design
This section describes procedures that are specific to the chaining DMA
example design.
chained_dma_test Procedure
The chained_dma_test procedure is the top level procedure that runs
the chaining DMA read and the chaining DMA write
dma_rd_test Procedure
The dma_rd_test procedure is used for DMA read, from the Endpoint
memory to the BFM shared memory.
Address of the endpoint
BAR number to analyze
When set, the Root Port uses native PCI express MSI to detect the DMA
completion
When set, the Root Port uses BFM shared memory polling to detect the
DMA completion.
Address of the endpoint bar_table structure in BFM shared memory
BAR number to analyze
When 0
When 1
When 2
When 3
When set, the Root Port uses native PCI express MSI to detect the DMA
completion
When set, the Root Port uses BFM shared memory polling to detect the
DMA completion.
PCI Express Compiler Version 6.1
read,
write,
Read then Write
Write then Read
bar_table
structure in BFM shared memory
PCI Express Compiler User Guide
5–61