IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 229
IPR-PCIE/8
Manufacturer Part Number
IPR-PCIE/8
Description
IP CORE Renewal Of IP-PCIE/8
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-PCIE/8
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Express Compiler, x8 Link Width
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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Altera Corporation
December 2006
Byte 0
Byte 4
Byte 8
Byte 12 R
Byte 0
Byte 4
Byte 8
Byte 12 R
Byte 0
Byte 4
Byte 8
Byte 12
Byte 0
Byte 4
Byte 8
Byte 12 Vendor defined or all zeros for Slots Power Limit
Table B–6. Type 1 Configuration Write Request
Table B–7. Completion with Data
Table B–8. Completion Locked with Data
Table B–9. Message with Data
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 1 0 0 1 0 1 0 0 TC
Completer ID
Requester ID
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 1 0 0 1 0 1 1 0 TC
Completer ID
Requester ID
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 1 1 1 0 r
Requester ID
Vendor defined or all zeros for Slot Power Limit
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 TD EP 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Requester ID
Bus Number
2
r
1
r
0
+1
+1
+1
Device Nb.
+1
0 TC
PCI Express Compiler Version 6.1
0 0 0 0 TD EP Attr
0 0 0 0 TD EP Attr
0 0 0 0 TD EP 0 0 0 0 Length
Func
+2
Status
Tag
+2
Status
Tag
+2
Tag
0
+2
Tag
6
6
6
0
6
5 4 3 2 1 0 7 6 5 4 3 2 1 0
5 4 3 2 1 0 7 6 5 4 3 2 1 0
5 4 3 2 1 0 7 6 5 4 3 2 1 0
0 0 Ext. Reg.
5 4 3 2 1 0 7 6 5 4 3 2 1 0
B Byte Count
B Byte Count
0 0 Length
0 0 Length
PCI Express Compiler User Guide
+3
0 0 0 0 First BE
Register Nb.
+3
0 Lower Address
+3
0 Lower Address
+3
Message Code
0 0
B–3
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