IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 78

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Parameter Settings
3–40
PCI Express Compiler User Guide
Desired performance
for received
completions
RX Buffer Space
Allocation
Table 3–20. Buffer Setup Page Parameters (Part 3 of 3)
Parameter
Low, Medium,
High, Maximum
Read-Only Table The Rx Buffer Space Allocation table shows the credits and space
Value
PCI Express Compiler Version 6.1
Specify how to configure the Rx Buffer size and the flow control
credits.
●
●
●
●
For more information, see data credits in the section,
Throughput” on page
allocated for each flow-controllable type, based on the Rx Buffer Size
setting. All virtual channels use the same Rx Buffer space allocation.
The table does not show non-posted data credits because the
MegaCore function always advertises infinite non-posted data credits
and automatically has room for the maximum 1 DWORD of data that
can be associated with each non-posted header.
The numbers shown for completion headers and completion data
indicate how much space is reserved in the Rx Buffer for completions.
However, infinite completion credits are advertised on the PCI Express
link as is required for endpoints. It is up to the application layer to
manage the rate of non-posted requests made to ensure that the Rx
Buffer completion space does not overflow.
Low—Provides the minimal amount of space for received
completions. Select this option when the throughput of the received
completions is not critical to the system design. This would also be
used when you application is expected to never initiate read
requests on the PCI Express links. Selecting this option will
minimize the device resource utilization.
Medium—Provides a moderate amount of space for received
completions. Select this option when the received completion
traffic does not need to use the full link bandwidth, but is expected
to occasionally use bursts of a couple maximum sized payload
packets.
High—Provides enough buffer space to main full link bandwidth of
received requests with typical external link delays and FC Update
processing delays by the attached PCI Express port. Use this
setting in most circumstances where full link bandwidth is needed.
This is the default.
Maximum—Provides additional space to allow for additional
external delays (link side and application side) and still allows full
throughput.
If you need more buffer space than this parameter supplies, select
a larger payload size and this setting. Doing this increases the
buffer size and slightly increase the number of logic elements (LEs)
to support a larger Payload size than will be used.
3–11.
Description
Altera Corporation
December 2006
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