EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 101

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Introduction
DSP Block
Overview
Altera Corporation
October 2007
SIII51005-1.2
The Stratix
digital signal processing (DSP) blocks optimized for DSP applications.
These DSP blocks of the Altera
generation of hardwired, fixed function silicon blocks dedicated to
maximizing signal processing capability, ease of use, and lowest silicon
cost.
Many complex systems such as WiMAX, 3GPP WCDMA,
high-performance computing (HPC), voice over Internet protocol (VoIP),
H.264 video compression, medical imaging, and HDTV use sophisticated
digital signal processing techniques, and this typically requires a large
number of mathematical computations. Stratix III devices are ideally
suited as the DSP blocks consist of a combination of dedicated elements
that perform multiplication, addition, subtraction, accumulation,
summation, and dynamic shift operations. Along with the
high-performance Stratix III soft logic fabric and TriMatrix™ memory
structures, you can configure these blocks to build sophisticated
fixed-point and floating-point arithmetic functions. These can be
manipulated easily to implement common larger computationally
intensive subsystems such as finite impulse response (FIR) filters,
complex FIR filters, infinite impulse response (IIR) filters, fast Fourier
transform (FFT) functions, and discrete cosine transform (DCT)
functions.
Each Stratix III device has two to seven columns of DSP blocks that
implement multiplication, multiply-add, multiply-accumulate (MAC),
and dynamic shift functions efficiently. The logical functionality of the
Stratix III DSP block is a superset of the previous generation of the DSP
block found in Stratix and Stratix II devices.
Architectural highlights of the Stratix III DSP block include:
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High-performance, power-optimized, fully registered and pipelined
multiplication operations
Natively supported 9-bit, 12-bit, 18-bit, 36-bit wordlengths
Natively supported 18-bit complex multiplications
Efficiently supported floating-point arithmetic formats (24-bit for
single precision and 53-bit for double precision)
Signed and unsigned input support
®
III family of devices have dedicated high-performance
5. DSP Blocks in Stratix III
®
Stratix device family are the third
Devices
5–1