EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 268

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Conclusion
Figure 7–31. Single-Ended Column I/O Pin Placement with Respect to LVDS I/O Pins
Conclusion
Referenced
Documents
7–50
Stratix III Device Handbook, Volume 1
No single - ended input
with OCT R T
Stratix III devices provide I/O capabilities that allow you to work in
compliance with current and emerging I/O standards and requirements.
With the Stratix III device features, you can reduce board design interface
costs and increase development flexibility.
This chapter references the following documents:
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■
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AN 224: High-Speed Board Layout Guidelines
AN 315: Guidelines for Designing High-Speed FPGA PCBs
DC and Switching Characteristics of Stratix III Devices
External Memory Interfaces in Stratix III Devices
High-Speed Differential I/O Interface with DPA in Stratix III Devices
No single -ended outputs
equal to or greater than 8 mA
SE output less than 8 mA or SE input without OCT R
LVDS I/O
SE output equal to or more than 8 mA or SE input with OCT R
Altera Corporation
November 2007
T
T