EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 257
EP3SE50F780I3N
Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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Part Number:
EP3SE50F780I3N
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Figure 7–22. Stratix III HSTL I/O Standard Termination
Note to
(1)
Altera Corporation
November 2007
External
On-Board
Termination
Termination
OCT
Receive
OCT
in Bi-
Directional
Pins (1)
OCT
Transmit
In Stratix III devices, series and parallel OCT cannot be used simultaneously. For more information, refer to
“Dynamic On-Chip Termination” on page
Figure
Series OCT
50 Ω
Stratix III
Stratix III
Series OCT 50 Ω
7–22:
Transmitter
Transmitter
f
Transmitter
V CCIO
100 Ω
100 Ω
HSTL Class I
Differential I/O Standards Termination
Stratix III devices support differential SSTL-2 and SSTL-18, differential
HSTL-18, HSTL-15, HSTL-12, LVDS, LVPECL, RSDS, and mini-LVDS
Figures 7–23
termination on Stratix III devices.
Differential HSTL and SSTL outputs are not true differential outputs.
They use two single-ended outputs with the second output programmed
as inverted.
50 Ω
50 Ω
50 Ω
50 Ω
V REF
V REF
50 Ω
50 Ω
V REF
V TT
V TT
Stratix III
V CCIO
V CCIO
100 Ω
100 Ω
100 Ω
100 Ω
7–28.
through
Receiver
Receiver
Receiver
Stratix III
Parallel OCT
Series OCT
50 Ω
7–29
show the details of various differential I/O
Series OCT
25 Ω
Stratix III
Stratix III
Series OCT 25 Ω
Transmitter
Transmitter
Transmitter
HSTL Class II
Stratix III Device Handbook, Volume 1
V CCIO
100 Ω
100 Ω
Stratix III Device I/O Features
V TT
V TT
V TT
50 Ω
50 Ω
50 Ω
50 Ω
V REF
50 Ω
50 Ω
V REF
50 Ω
50 Ω
50 Ω
V REF
V TT
V TT
Stratix III
V CCIO
100 Ω
V CCIO
100 Ω
100 Ω
100 Ω
Receiver
Receiver
Receiver
Stratix III
Parallel OCT
Series OCT
25 Ω
7–39
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