EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 376

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Fast Passive Parallel Configuration
Figure 11–5. Multiple-Device FPP Configuration Using an External Host When Both Devices Receive the
Same Data
Notes to
(1)
(2)
11–16
Stratix III Device Handbook, Volume 1
(MAX II Device or
Microprocessor)
You should connect the pull-up resistor to a supply that provides an acceptable input signal for all devices in the
chain. V
The nCEO pins of both Stratix III devices are left unconnected when configuring the same configuration data into
multiple devices.
External Host
ADDR DATA[7..0]
Figure
Memory
CC
should be high enough to meet the V
11–5:
f
10 kΩ
V
CC
You can use a single configuration chain to configure Stratix III devices
with other Altera devices that support FPP configuration, such as other
types of Stratix devices. To ensure that all devices in the chain complete
configuration at the same time, or that an error flagged by one device
initiates reconfiguration in all devices, tie all of the device CONF_DONE
and nSTATUS pins together.
For more information on configuring multiple Altera devices in the same
configuration chain, refer to
Configuration Handbook.
FPP Configuration Timing
Figure 11–6
using a MAX II device as an external host. This waveform shows the
timing when the decompression and the design security feature are not
enabled.
(1)
V
CC
10 kΩ
(1)
GND
shows the timing waveform for FPP configuration when
CONF_DONE
nSTATUS
nCONFIG
DCLK
nCE
DATA[7..0]
Stratix III Device
IH
specification of the I/O on the device and the external host.
MSEL[2..0]
nCEO
Configuring Mixed Altera FPGA Chains
GND
N.C. (2)
GND
nCE
CONF_DONE
nSTATUS
DATA[7..0]
nCONFIG
DCLK
Stratix III Device
Altera Corporation
MSEL[2..0]
November 2007
nCEO
GND
in the
N.C. (2)