EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 246

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EP3SE50F780I3N

Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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OCT Support
7–28
Stratix III Device Handbook, Volume 1
Dynamic On-Chip Termination
Stratix III devices support on-off dynamic series and parallel termination
for a bi-directional I/O in all I/O banks.
termination schemes supported in the Stratix III device. Dynamic parallel
termination is enabled only when the bi-directional I/O acts as a receiver
and is disabled when it acts as a driver. Similarly, dynamic series
termination is enabled only when the bi-directional I/O acts as a driver
and is disabled when it acts as a receiver. This feature is useful for
terminating any high-performance bi-directional path because the signal
integrity is optimized depending on the direction of the data.
Differential SSTL-18
Class I, II
Differential SSTL-15
Class I, II
Differential HSTL-18
Class I, II
Differential HSTL-15
Class I, II
Differential HSTL-12
Class I, II
Table 7–7. Selectable I/O Standards with On-Chip Parallel Termination with
Calibration (Part 2 of 2)
I/O Standard
Termination Setting
On-Chip Parallel
(Column I/O)
50
50
50
50
50
Figure 7–12
Termination Setting
On-Chip Parallel
(Row I/O)
50
50
50
50
50
shows the
Altera Corporation
November 2007
Unit
Ω
Ω
Ω
Ω
Ω

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